1. Field of the Invention
The present invention is related to a substrate for mounting a semiconductor element and, more specifically, to a substrate for mounting a semiconductor element to be used for package-on-package (POP), in which another substrate for mounting a semiconductor element is further mounted on the substrate for mounting a semiconductor element.
2. Description of the Related Art
As wiring in IC chips is becoming finer and more highly integrated, the number of pads formed on the uppermost layer of a mounting substrate is increasing, and the pads accordingly are becoming even further fine-pitched. As a result, the wiring pitch of the mounting substrate is becoming finer at a high pace. However, current technology for forming wiring in a resin substrate can hardly match the pace at which the wiring of IC chips is becoming more finely pitched. Therefore, in the substrate for mounting a semiconductor element disclosed in Patent Publication (1), an Si substrate in which is easier to form fine wiring is built into a resin substrate, fine wiring layers are formed on the Si substrate, and then a semiconductor element is mounted. [Patent Publication 1] Japanese Laid-Open Patent Publication 2004-281830. The contents of this publication are incorporated herein by reference in their entirety.
However, as shown in Patent Publication (1), in a substrate for mounting a semiconductor element, if an Si substrate having a low-thermal expansion coefficient and high Young's modulus is accommodated inside the resin substrate, the following problems occur:
(1) Due to a difference in thermal expansion coefficients between a resin insulation layer that forms the mounting substrate and the Si substrate, peeling may occur between the Si substrate and the resin insulation layer.
(2) Heat generated in the semiconductor element is conveyed inside the mounting substrate through the Si substrate with high thermal conductivity. As a result, due to a difference in thermal expansion coefficients between the resin insulation layer that forms the mounting substrate and metal material that forms conductive circuits, cracks originating in the edge portions of via lands of conductive circuits may occur in the resin insulation layer. Then, if such cracks that occurred in the resin insulation layer reach the Si substrate, the Si substrate with a high Young's modulus and low degree of plasticity will break accordingly, thus the electrical connection with the semiconductor element will fail.
Such problems described in above (1) and (2) tend to occur directly under the semiconductor element where impacts from thermal history are especially notable.